1. Field of the Invention
The present invention relates to a trigger circuit of a column redundant circuit, and more particularly, to a trigger circuit for a column redundant device.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a schematic diagram illustrating a conventional column redundant device 100. As shown in FIG. 1, the column redundant device 100 comprises a column redundant circuit 110 and a trigger circuit 120. The column redundant circuit 110 is also known as a Redundant Column Selection Line (RCSL). The trigger circuit 120 comprises an activation fuse set 121, a comparator 122 and a column address fuse set 123.
The column redundant device 100 is utilized for replacing failed memory cells of a DRAM (Dynamic Random Access Memory). For example, if the memory cell in the Xth column and the Yth row is failed, when the DRAM accesses the memory cell in the Xth column and the Yth row, the trigger circuit 120 will trigger the column redundant circuit 110 to replace all of the memory cells in the Xth column. As a result, the DRAM will not access the failed memory cell. Therefore, the column redundant circuit 110 necessarily comprises a column of memory cells for replacing a column of memory cells having even only one failed memory cell.
In the trigger circuit 120, the column address fuse set 123 is utilized for recording column addresses of the failed memory cells. As mentioned above, if the failed memory cell exists in the Xth column and the Yth row, the column address fuse set 123 will record the column address “X”. The activation fuse set 121 is utilized for storing signals that determines if the trigger circuit 120 should be enabled (activated). If the signals stored in the activation fuse set 121 determine that the trigger circuit 120 should be enabled, the activation fuse set 121 will enable the comparator 122. On the contrast, if the signals stored in the activation fuse set 121 determine that the trigger circuit 120 should not be enabled, the activation fuse set 121 will not enable the comparator 122. The comparator 122 comprises an activation end, a first input end, a second input end, and an output end. The activation end of the comparator 122 is utilized for receiving signals from the activation fuse set 121 and the comparator 122 is enabled accordingly. The first input end of comparator 122 is utilized for receiving column addresses of the memory cells accessed by the DRAM. The second input end of the comparator 122 is electrically connected to the column address fuse set 123, for receiving the recorded column addresses of the failed memory cells (i.e. the column “X”). When the comparator 122 is enabled, the comparator 122 compares the column address of the memory cell accessed by the DRAM and the recorded column address of the column address fuse set 123. If both are the same, it means that a failed memory cell exists in the column address corresponding to the memory cell accessed by the DRAM, causing the comparator 122 generating a trigger signal to the column redundant circuit 110. When the column redundant circuit 110 receives the trigger signal transmitted from the comparator 122, the column redundant circuit 110 automatically replaces all of the memory cells in the Xth column. So, the DRAM accesses the memory cells replaced by the column redundant circuit 110 instead of the failed memory cells.
The drawback of the prior art is when there is a failed memory cell in a column of memory cells, the column redundant circuit 110 replaces the column of memory cells having a failed memory cell with a corresponding column of memory cells. In other words, if there are N failed memory cells spreading in different columns, the column redundant circuit 110 needs N columns of memory cells for replacement. However, there are other usable memory cells in the column of memory cells only having a failed memory cell to be abandoned and wasted, causing the column redundant circuit 110 needs more memory cells to work.
In addition, as long as the DRAM accesses data, the comparator 122 is required to compare the column address of the memory cell accessed with the recorded column addresses of failed memory cells. Since accesses for the column address in the DRAM are faster and more than that for the row address, the comparator 122 is required to compare frequently, causing considerable power consumption.